The present invention relates to the field of low-power integrated circuits. More particularly, the present invention relates to a low-power startup circuit for use with bias current generators for integrated circuits.
Within the communications industry, there is an ever increasing need for higher performance portable devices having long battery lives. For example, handheld personal information devices (e.g., palmtop computers), cell phones, pagers, and the like, are processing data at faster rates, performing more sophisticated functions, and storing larger amounts of data, while simultaneously functioning for increased periods of time on internal battery power. For example, it is not uncommon for modern cell phone devices to operate continuously in standby mode for several days on end.
Low-power integrated circuits are critical to extend functioning on internal battery power for such handheld devices. To extend battery life, many handheld devices are designed to enter a standby mode when there full functionality is not required by the user. For example, a cell phone is designed to enter a standby mode when it is not being used in a voice conversation. The cell phone can xe2x80x9cwake upxe2x80x9d from standby when a call is received or when the user desires to place a new call. Similarly, many personal information devices are designed to enter standby mode after some duration of non-use from the user, and wake up when the user activates some function, accesses some data (e.g., clicks a GUI icon) etc. While in standby mode, modern battery power devices are designed to require minimal amounts of power, thereby extending their battery lives.
Well-designed standby mechanisms can greatly extend the functional life of a portable battery power device. Accordingly, the design of integrated circuits that implement standby modes, wake up modes, and full functionality is an area of great interest to the electronics industry. The design of an optimal standby mechanism can be challenging. For example, not only does the standby circuitry have to draw minimal amounts of current while in standby, the standby circuitry has to reliably wake up the device upon some external event, such as, in the case of a cell phone, receiving an incoming phone call. Specific circuits have been designed to ensure the overall device reliably wakes up after being in standby. Such circuits are referred to as startup circuits. Startup circuits are used in powering up devices from a power off condition in addition to waking up devices from sleep modes. For example, the startup circuit must ensure a device reliably powers on from an off state in a predictable fashion, into a known operating state.
Prior art FIG. 1A, FIG. 1B, and FIG. 1C show schematic diagrams of prior art of startup circuits. FIG. 1A shows a startup circuit 10. Startup circuit 10 relies on a very large resistor 11 (e.g., 50 mega-ohms) to reduce the magnitude of the startup current Istart1. The startup current Istart1 is used to start the bias generator circuit 12. Istart1 flows continuously and needs to be a constant magnitude. This startup current is what enables the bias generator 12 to wake up the overall device. For example, the startup current allows bias generator 12 to generate a biasing current for the rest of the device (not shown) that in turn, allows the startup of circuit elements such as VCOs, PLLs, output drivers, and the like. If Istart1 is too low, the bias generator 12 cannot wake up the rest of the circuit. If Istart1 is too high, the standby power consumption will be too high, and thus, battery life will be too short. Startup circuit 10 uses the very large resistor 11 to tailor the magnitude of the startup current Istart1.
There exists a problem with startup circuit 10 however, in that it is very difficult to fabricate very large resistors such as the 50 mega-ohm resistor 11 using VLSI fabrication techniques. With sub-micron fabrication techniques, large resistors require an excessive amount of die surface area. In addition, it is difficult to reliably ensure the correct magnitude of the resistor.
Prior art FIG. 1B shows startup circuit 20 and prior art FIG. 1C shows startup circuit 30. Startup circuits 20 and 30 attempt to reduce the problem of the large resistor 11 from startup circuit 10 by chaining together transistors to reduce the need for such a large resistor. In startup circuit 20, a set of diode connected transistors 21-23 are included to reduce the voltage drop experienced by the resistor 25. In this manner, the transistors 21-23 multiply the resistance of resistor 25. In startup circuit 30, a string of very long channel transistors are used to completely replace the large resistor 11 of startup circuit 10. Startup circuits 20 and 30 are both functional, however, they both produce undesirable characteristics in their startup currents Istart2 and Istart3.
Prior art FIG. 2 shows a graph depicting the magnitude of the startup currents Istart1, Istart2, and Istart3 with respect to the voltage level of the battery (e.g., Vdd). As shown in FIG. 2, line 40 shows an ideal case for a startup current. In the ideal case (line 40), the startup current is constant with respect to the voltage level of the battery. Thus, as the battery slowly drains over time, the start up current remains at the optimal level (e.g., 100 nA). None of the startup currents is close to ideal, however, Istart1 from startup circuit 10 is more desirable since it increases linearly with battery power, while Istart2 and Istart3 are sharply non-linear. Thus, there exists the problem where startup circuits 20 and 30 suffer from poor low battery operation, while startup circuit 10 relies upon the difficult to fabricate large resistor 11.
Thus, what is required is a startup circuit which maintains a more constant, non-varying startup current over a range of power supply voltage level, in comparison to the prior art. What is required is a startup circuit than maintains a constant startup current that can be readily fabricated using modern VLSI fabrication techniques. In addition, what is required is a startup circuit that will reliably produce the required amount of startup current in order to reliably wake up an integrated circuit. The present invention provides a novel solution to the above requirements.
The present invention is a startup circuit which maintains a more constant, non-varying startup current over a range of power supply voltage level, in comparison to the prior art. The startup circuit of the present invention maintains a constant startup current that can be readily fabricated using modern VLSI fabrication techniques. In addition, the startup circuit of present invention will reliably produce the required amount of startup current in order to reliably wake up an integrated circuit.
In one embodiment, the present invention is implemented as a startup circuit having a wide channel transistor for producing a subthreshold leakage current. A current mirror is coupled to the wide channel resistor and is configured to receive the subthreshold leakage current and produce a startup current therefrom. The subthreshold leakage current produced by the wide channel transistor is constant with respect to a power supply voltage. The subthreshold leakage current produced by the wide channel transistor is constant with respect to a power supply voltage. The current mirror includes a first transistor diode connected to the wide channel transistor and a second transistor having a gate connected to a gate of the first transistor. The gate of the wide channel transistor is coupled to the gates of the first transistor and second transistor of the current mirror.
In so doing, the startup circuit of the present invention maintains a more constant, non-varying startup current over a range of power supply voltage level, and will reliably produce the required amount of startup current in order to reliably wake up an integrated circuit. The startup circuit of the present invention can be readily fabricated using modern VLSI fabrication techniques since no large resistors are required.
Within an integrated circuit device, in a multiple bias current generator block implementation, a plurality of startup circuits are provided, each configured to produce a startup current. A plurality of bias current generators are respectively coupled to the startup circuits to receive the startup currents and generate a bias current therefrom. A distribution circuit is coupled to the startup circuits to distribute the startup current produced by the startup circuits among the startup circuits. The distribution circuit is configured to distribute the startup current among the startup circuits such that a startup current from one of the plurality of startup circuits insures that other ones of the plurality of startup circuits will produce their respective startup currents. The plurality of bias current generators and the plurality of startup circuits are respectively combined into bias current generator blocks within the integrated circuit device. The bias current generator blocks are distributed within the integrated circuit device to provide respective startup bias currents to respective portions of the integrated circuit device.